Increasing the Instruction-Level Parallelism through Data-Flow Manipulation

In recent years several techniques for exceeding the program’s data-flow constraints have been proposed. These include value prediction, instruction reuse, and dependency redirection. In this paper we show how they can be regarded as one universal method of performing what we term result reuse. We study in depth the dependency redirection derivative and propose several hardware schemes to accomplish it. First, we summarize the necessary changes to the execution core, and propose a novel mechanism that allows us to treat value-identical instructions symmetrically (disregarding their original ordering). To perform value-identity detection, two options are explored: a new cost-effective value-identity predictor that is highly accurate; and a safe method, to determine valueidentity through expression tracking. In addition we provide two specific applications of the techniques. The first eliminates unnecessary load operations – redundant load elimination. The second technique translates data-dependencies based on control-flow speculation, effectively using the branch predictor to perform value-speculation.